Applications of Specification and Design Languages for SoCs: by A. Vachoux

By A. Vachoux

This publication contains a choice of the simplest contributions to the discussion board on Specification and layout Languages held in 2005 (FDL'05). It presents certain insights into contemporary works facing a wide spectrum of concerns in system-on-chip layout. the entire chapters were rigorously revised and prolonged to provide up to date info. additionally they supply seeds for extra researches and advancements within the box of heterogeneous systems-on-chip design.

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2003) Polychrony for system design. Journal of Circuits, Systems and Computers, 12(3):261–303. Lee, E. A. and Parks, T. M. (1995) Dataflow process networks. Proceedings of the IEEE, 83(5):773–801. , and Hardee, P. (2000) Standards for system-level design: practical reality or solution in search of a question? In: Proceedings of Design Automation and Test in Europe (DATE) 2000. Paris, France. , and Jantsch, A. (2002) A case study of hardware and software synthesis in ForSyDe. In: Proceedings of the 15th International Symposium on System Synthesis.

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IEEE, Cairo, Egypt. Gastin, P. and Oddoux, D. (2001) Fast LTL to büchi automata translation. , and Finkel, A. (eds) Computer Aided Verification: 13th International Conference, CAV 2001, vol. 2102 of Lecture Notes in Computer Science. Springer, Paris, France, pp. 53–65. , and Slind, K. (2003) Executing the formal semantics of the accellera property specification language by mechanised theorem proving. In: Geist, D. and Tronci, E. 5 Advanced Research Working Conference, CHARME 2003, vol. 2860 of Lecture Notes in Computer Science.

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